Embedded MRAM; object-oriented programming and UVM; thermal simulation; memory safety; antenna type primer.
Synopsys’ Rahul Thukral and Bhavana Chaurasia find that embedded MRAM is undergoing an uplift in utilization for low-power, advanced-node SoCs thanks to its high capacity, high density, and ability to scale to lower geometries.
Siemens EDA’s Chris Spear dives into the UVM Factory with a look at the SystemVerilog Object-Oriented Programming concepts behind the factory.
Cadence’s Veena Parthan considers the electronics thermal simulation landscape and the potential for nanophotonic cooling.
Arm’s Michael Lu explains why the Memory Tagging Extension is a vital security feature to tackle the industry-wide challenge of memory safety bugs.
Ansys’ Arien Sligar provides an introduction to common antenna designs, from simple wire dipole antennas to phased multiple-input and multiple-output arrays, and how to choose the best for a project.
Renesas’ Kayoko Nemoto highlights the importance of the industrial communication network and why Ethernet has slowly but steadily replaced traditional communication protocols in industrial operational technology.
In a blog for SEMI, EMD Electronics’ Katherine Hutchinson and Anand Nambiar consider why a collaborative approach is necessary to change company cultures and promote a diverse workforce.
Nvidia’s Ronnie Vasishta and Soma Velayutham highlight five key challenges facing the telecom industry and how AI and accelerated computing can address them and drive growth.
Plus, catch up on the blogs featured in the latest Automotive, Security, & Pervasive Computing and Test, Measurement & Analytics newsletters:
Rambus’ Bart Stevens looks at making symmetric cryptography as small and energy-efficient as possible while maintaining sufficient security.
Synopsys’ Ron DiGiuseppe contends that software will remain an essential component to fuel automotive advancements.
Siemens EDA’s Lee Harrison demonstrates monitoring transactions occurring during the boot sequence to protect connected vehicles.
Arteris’ Frank Schirrmeister digs into supply chain issues that are toppling design chains in all major areas.
Riscure’s Marc Witteman explains how a lightweight crypto algorithm delivers low-cost encryption and integrity verification for IoT and other resource-constrained devices.
Flex Logix’s Geoff Tate shows how to reduce the number of metal layers used by eFPGAs.
Cadence’s Anne-Marie Schelkens explains why combining standard numerical optimization with sensitivity analysis results in designs that are less sensitive to manufacturing and operating uncertainties.
Onto Innovation’s Keith Best examines how cumulative overlay drift from individual RDL buildup layers can significantly increase overall trace length.
Synopsys’ Nozar Nozarian explains how to achieve optimal compiler configuration for a given workload using AI.
Teradyne’s Regan Mills digs into how to make engineers more productive and speed time to high-volume manufacturing.
Advantest’s Jan Ermert argues that to provide a margin that guarantees reliable test results, equipment needs to be multiple decibels better in EVM measurements than the DUT.
Nova’s Noa Shinar-Ron shows how to turn a basic technology into a commercially available product.
Jesse Allen
(all posts)
Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.
