A technical paper titled “A Review of the Gate-All-Around Nanosheet FET Process Opportunities” was published by researchers at IBM Research Albany.

Abstract:
“In this paper, the innovations in device design of the gate-all-around (GAA) nanosheet FET are reviewed. These innovations span enablement of multiple threshold voltages and bottom dielectric isolation in addition to impact of channel geometry on the overall device performance. Current scaling challenges for GAA nanosheet FETs are reviewed and discussed. Finally, an analysis of future innovations required to continue scaling nanosheet FETs and future technologies is discussed.”

Find the technical paper here. Published November 2022.

Mukesh, Sagarika, and Jingyun Zhang. 2022. “A Review of the Gate-All-Around Nanosheet FET Process Opportunities” Electronics 11, no. 21: 3589. https://doi.org/10.3390/electronics11213589.

Source: https://semiengineering.com/innovations-in-device-design-of-the-gate-all-around-gaa-nanosheet-fets-ibm-research/