A quick look at ChatGPT shows that while it is surprisingly good, it will not replace me anytime soon.
Everyone is talking about ChatGPT these days, and I am sure we will be comparing it with Google’s new offering before long. I thought it was time that I gave it a quick spin, and since I am preparing to moderate a webinar about chiplets as I write this, I decided it was a good example of a fairly new field and would be a good test.
I started by asking, “What are semiconductor chiplets, what are the barriers to adoption, the business issues, and when will they become mainstream?” ChatGPTs response:
“Semiconductor chiplets are small, standardized blocks of integrated circuits (ICs) that can be combined to form a larger, more complex IC. The concept is to reduce the cost and time of designing and manufacturing a single large IC by using existing, proven chiplets rather than starting from scratch.
Barriers to adoption include compatibility and integration issues between different chiplets and the end system, as well as the need for a well-established ecosystem of chiplet suppliers and design tools.
From a business perspective, there are concerns about intellectual property and the balance between customization and standardization. Companies may also be hesitant to rely on external suppliers for critical components of their products.
It is difficult to predict when chiplets will become mainstream, as it will depend on various factors such as the development of mature design tools and standards, as well as the growth of the chiplet ecosystem. However, the trend towards using chiplets is expected to continue as the semiconductor industry seeks to address the challenges of increasing complexity and cost in IC design and manufacturing.”
I have to say I was quite impressed because it did cover many of the major issues. However, it did miss some like Known Good Die issues, and I take issue with some of the things that it did focus on, such as companies being reluctant to rely on external IP. They have been doing this for years and it has become standard practice for the industry.
On further reflection, I also was disappointed. This is one of the most rapidly evolving and exciting areas of chip design right now, and ChatGPT managed to make it sound mundane. There is significant controversy in the market because companies that have been successful so far have been vertically integrated companies. They have developed custom flows, interfaces, and are dealing with issues such as reduced order models for the chiplets that can be used for system-level analysis in proprietary ways. These have to come together before a chiplet marketplace can become practical.
A couple of other thoughts crossed my mind. How often does it refresh what it knows and how does it decide what sources are more reliable? The first part I can test by reapplying the question over time and look at how the response may change. For the second part, I want to do an experiment and publish something that is blatantly wrong and see if it shows up in the answer. I would never actually do this, but we all know how much disinformation exists on the Internet. How does it weight competing information?
I then decided to force its hand a little and ask it specifically about die-2-die interface standards. I asked it to “Compare and contrast Bunch of Wires, Universal Chiplet Interconnect Express, and HBM for chiplet interconnect.” Its response:
“Bunch of Wires (BoW), Universal Chiplet Interconnect Express (UCIe), and High Bandwidth Memory (HBM) are interconnect technologies used in the semiconductor industry for connecting different chiplets.
BoW refers to a simple, low-cost interconnect solution where wires are used to connect chiplets. BoW is often used in lower-performance applications where low cost is a primary concern. However, its performance is limited by the number of wires and the signal integrity issues that can arise from routing signals over long distances.
UCIe is a new interconnect standard that provides a high-bandwidth, low-latency interface for connecting chiplets. UCIe is designed to be flexible, scalable, and modular, making it suitable for a wide range of applications. The standard also includes power management and thermal management features to support advanced chiplet-based systems.
HBM is a high-performance memory interconnect technology that is commonly used in graphics processing units (GPUs) and high-performance computing (HPC) applications. HBM provides a high-bandwidth, low-latency interface to a large pool of memory that is shared between multiple chiplets. HBM is designed to support high-bandwidth data transfer and is ideal for applications that require high memory bandwidth and low power consumption.
In summary, BoW provides a simple and low-cost solution, UCIe offers a flexible, high-performance interconnect, and HBM is designed for high-bandwidth memory applications. The choice of interconnect technology will depend on the specific requirements of each application.”
It has successfully managed to reduce each of the interfaces to a different capability such that it can be non-confrontational, and I wonder if this is part of its design. However, by trying to avoid conflict it has taken sides in the industry discussion because it clearly says that UCIe will not replace everything else and thus is not universal. I know people in the industry who would disagree with the summaries, perhaps arguing that BoW is just as modular and scalable as UCIe, and that UCIe also can operate at lower frequencies than the maximums that are defined in the specification.
Do I feel threatened by what it has created? Not at all. The text produced by ChatGPT is fine when it comes to providing subject summaries, but the issues that we write about go much deeper than single-paragraph descriptions. People want to know where the data is coming from. They want examples that companies will stand behind, and to hear from real people who have skin in the game. And where there is disagreement, they want it to be laid out in a manner so they can decide for themselves.
It probably will be a great tool, and perhaps I would use it to get a leg up on a new subject I am not familiar with. But rest assured, you will not find any content it generated appearing in my articles (with the exception of this one). The same is true for Wikipedia and other sources that I cannot verify. At least Wikipedia cites its sources, even if that list itself can be very biased.
Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.