Vertical Nanowire Gate-All-Around FETs based on the GeSn-Material System Grown on Si

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A new technical paper titled “Vertical GeSn nanowire MOSFETs for CMOS beyond silicon” was published by researchers at Peter Grünberg Institute 9, JARA, RWTH Aachen University, CEA, LETI, University of Grenoble Alpes, University of Leeds, and IHP.

“Here, we present high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transconductance is increased to 850 µS/µm by exploiting the small band gap of GeSn as source yielding high injection velocities, the mobility in n-FETs is increased 2.5-fold compared to a Ge reference device, by using GeSn as channel material. The potential of the material system for a future beyond Si CMOS logic and quantum computing applications is demonstrated via a GeSn inverter and steep switching at cryogenic temperatures, respectively,” states the paper.

Find the technical paper here. Published February 2023.

Liu, M., Junk, Y., Han, Y. et al. Vertical GeSn nanowire MOSFETs for CMOS beyond silicon. Commun Eng 2, 7 (2023).


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