Tag: National Taiwan University
Technical Paper Roundup: November 14
Industry Research Nanowire FETs; laterally gated FeFETs for in-memory computing; LLMs for chip design; RowHammer mitigation; CMOS in-memory XOR/XNOR; electrical property quantification of memory devices; noise on [more…]
Highly Stacked Nanowire FETs To Enhance Drive Current And Transistor Density
A technical paper titled “Fabrication and performance of highly stacked GeSi nanowire field effect transistors” was published by researchers at National Taiwan University. Abstract: “Horizontal gate-all-around field [more…]