Tag: Ecole Centrale de Lyon
Chip Industry’s Technical Paper Roundup: May 23
Industry Research Edge with RISC-V and HW accelerators; RL-guided routing; memory mapping using DL; cross-shape reconfigurable FET; memory disaggregation; EV charging security issues; PCM for analog in-memory [more…]
Cross-Shaped Reconfigurable Transistor (CS-RFET) With Flexible Signal Routing
A new technical paper titled “Cross-Shape Reconfigurable Field Effect Transistor for Flexible Signal Routing” was published by researchers at NaMLab gGmbH, École Centrale de Lyon, and TU [more…]
