UVM Factory and collaboration; chiplet compatibility; SI/PI in data centers; digital twins and system-level design.
Siemens EDA’s Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team.
Cadence’s Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn’t pre-plan for those specific chiplets to work together, as well as the problems of failure responsibility and security.
Synopsys’ Pavani Jella considers how the combination of faster data rates with more complex protocols is making it harder to meet signal and power integrity requirements in high-speed data center designs.
The ESD Alliance’s Bob Smith chats with Keysight’s Niels Faché about the importance of EDA tool interoperability, how a hierarchical methodology and digital twins enable system-level design, and the biggest areas of growth for the design automation industry over the next five years.
Coventor’s Dempsey Deng demonstrates how virtual fabrication can be used to evaluate new process integration schemes to reduce DRAM bitline parasitic capacitance with a simulation study comparing CBL-NC using a Nitride-Oxide-Nitride (NON) spacer, a low k spacer, and an airgap spacer.
Renesas’ Graeme Clark argues that the oscillator is the heart of any microcontroller system, and as such should receive the appropriate amount of attention to make sure that the design is as reliable as possible.
Ansys’ Mariano Morales finds that electrification of the aviation industry brings with it unique challenges, from battery technologies for longer-range flights to establishing infrastructure for in-flight charging and necessary advancements in electric airplane motor technology.
In a podcast, Arm’s Geof Wheelwright and Remy Pottier join 311 Institute’s Matt Griffin to chat about the technological foundations for the metaverse and what is needed to drive it forward, including 5G, hardware and software innovation, improved human-machine interfaces, and the perspectives of a younger generation of technology users.
Nvidia’s Angie Lee explains large language models, the deep learning algorithm that can recognize, summarize, translate, predict and generate text and other content based on knowledge gained from massive datasets.
Western Digital’s Ronni Shendar checks out a startup working towards analyzing satellite data before sending it to Earth and why establishing storage and computing infrastructure in orbit could open up possibilities for new space data applications.
Lithography expert Chris Mack shares highlights from the first day of SPIE 2023.
And don’t miss the blogs featured in the latest Systems & Design newsletter:
Technology Editor Brian Bailey takes a quick dive into ChatGPT and concludes that while it is surprisingly good, it will not replace us anytime soon.
Keysight’s Ben Miller predicts high-speed data center networks will play a crucial role in the emerging technologies of tomorrow.
Cadence’s Paul McLellan looks at what’s needed to establish a chiplet marketplace, from intellectual property concerns to interoperability.
Synopsys’ James Chuang finds that integrating logic synthesis, place-and-route, and timing sign-off into a single step eliminates surprises in the implementation flow.
Siemens EDA’s Kesmat Shahin explains why performing efficient early-stage LVS runs will simplify debugging.
Codasip’s David Marsden highlights ready-to-use security that can be optimized for unique applications.
Renesas’ Toshio Kimura looks at a new way to measure the power consumed by home appliances and industrial equipment.
Jesse Allen
(all posts)
Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.
